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Demultiplexers (DeMux) and Decoders

Digital Logic Systems: From Zero to Hero

25. Demultiplexers (DeMux) and Decoders

Demultiplexers and Decoders are closely related circuits used for routing and address decoding.

1. Demultiplexer (DeMux)

A DeMux performs the reverse operation of a Mux. It takes a single input and routes it to one of several output lines, based on the select lines.

  • 1-to-N DeMux: Has 1 data input ($D$) and $S$ select lines ($N=2^S$) leading to $N$ outputs.

Logic (1-to-4 DeMux with $S_1, S_0$ select lines):

$$\text{Output } Y_0 = \overline{S_1}\overline{S_0} D$$ $$\text{Output } Y_3 = S_1 S_0 D$$

2. Decoders

A Decoder (N-to-$2^N$) has N input lines (address/code) and $2^N$ output lines. Crucially, a decoder has no data input; it simply generates a unique enable signal (HIGH) on one specific output line based on the binary input code.

Example: 2-to-4 Decoder (Inputs $A, B$):

  • Input 00 activates Output $Y_0$ ($\overline{A}\overline{B}$).
  • Input 11 activates Output $Y_3$ ($A B$).

Decoders are vital in computer architecture for memory addressing, selecting specific registers, or activating appropriate peripheral devices.