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Combinational Logic: Half Adder Design

Digital Logic Systems: From Zero to Hero

19. Combinational Logic: Half Adder Design

We now move into designing functional digital circuits. Combinational logic means the output depends solely on the current inputs (it has no memory).

Arithmetic Circuits: Adders

Adders are the fundamental components for all arithmetic operations within a CPU.

The Half Adder (HA)

The Half Adder performs the binary addition of two single bits, A and B.

Inputs: A, B (two single bits) Outputs:

  1. Sum (S): The result of the addition.
  2. Carry Out ($C_{out}$): The carry generated to the next stage.

Truth Table

ABS$C_{out}$
0000
0110
1010
1101

Logic Implementation

By examining the truth table:

  • Sum (S): Matches the XOR operation. $S = A \oplus B$
  • Carry Out ($C_{out}$): Matches the AND operation. $C_{out} = A \cdot B$

A Half Adder is implemented using one XOR gate and one AND gate.