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Practical Logic Constraints: Fan-in, Fan-out, and Delays

Digital Logic Systems: From Zero to Hero

18. Practical Logic Constraints: Fan-in, Fan-out, and Delays

Theoretical logic assumes perfect gates, but real physical gates have limitations that affect circuit performance.

1. Fan-in

Fan-in is the maximum number of inputs a physical gate can accept. Standard gates usually have 2, 3, or 4 inputs. If an expression requires a 5-input AND, you must construct it using multiple smaller gates (e.g., two 3-input gates).

2. Fan-out

Fan-out is the maximum number of inputs (loads) that a single gate output can drive without exceeding the allowed current limits and degrading the voltage levels (signal integrity). Exceeding fan-out causes slow operation and unreliable logic levels.

3. Propagation Delay ($t_{pd}$)

Propagation delay is the time required for a signal to pass through a gate, from the moment an input changes until the output stabilizes. It is measured in nanoseconds (ns).

  • $t_{PHL}$: Delay when the output changes from High to Low.
  • $t_{PLH}$: Delay when the output changes from Low to High.
  • Total Delay: In a chain of gates, the total delay is the sum of the propagation delays of all gates along the path (known as the critical path).

Reducing the number of gate levels (simplification) directly reduces the overall propagation delay, leading to faster circuits.